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[DGUPTA]

I have an existing assembler program. When I see the compiled listing of the code, I am not able to understand how is the addressability being done. I am putting a part of the compile listing of the code as below.


Now, if we see for the Label xxxx. The code branches to this label xxxx twice in the Statement no. 3224 & 3232. But if we see in the Oject Code for the two statements the address to which each branches is different in the two cases (0019 in first case and 0010 in second case).

In the Comments for the program it specifies that it does not use Base Register + Displacement type of Addressing but BRANCH RELATIVE ADDRESSING. I don't have an idea on BRANCH RELATIVE ADDRESSING.

Please help me understand the compile listing of the program and the type of Addresing used.


Thanks,
dgupta.

[hsubra]

Gupta,

This is my understanding of relative addressing :

The relative addressing is introduced in z/OS concept (I think) where instead of BAS you can use BRAS. The BRAS is nothing but BRANH RELATIVE AND SAVE.

Relative Branch Addressing :
An operand address that refers to storage is derived from an intermediate value, which either is contained in a register designated by an R field in
the instruction or is calculated from the sum of three binary numbers: base address, index, and displacement.

From Your code:
------ ----- ------
From Address 1940 it is jumping to 1972: So your operand will be
(1972 - 1940 ) / 2 = 19. In the second case the operand is derived by
( 1972 - 1952 ) / 2 = 10. This way the relative address is working.

The execution of relative adressing :
A branch instruction affects instruction sequencing by introducing a new instruction address into the current PSW. The relative-branch instructions
with a 16-bit Index field allow branching to a location at an offset of up to plus 64K - 2 bytes or minus 64K bytes relative to the location of the branch instruction, without the use of a base register. The relative-branch instructions with a 32-bit Index field allow branching to a location at an offset of up to plus 4G - 2 bytes or minus 4G bytes relative to the location of the branch instruction, without the use of a base register.

Please anyone correct me if I am wrong.

Cheers,
Subra.

[DGUPTA]

Hi Subra,

Thanks a lot for the clarification.

But I still need a bit more on this. Am I right to say that in this type of addressing, we don't use a base register at all. And what decided whether it will be 32-bit or 64-bit index addressing. How does the compiler distinguish whether the address to be branched to is to be added to present address of instruction or it is to be substracted.

Now, in the same code there are places where base register and displacement concept is also being used alongwith. We have a Work-area defined at bottom of the program ( this has only DC and DS statements), the labels of which are referenced by a base register and displacement in the code.

Also, When I add any DC statement with a label in the code ( not in the work-area I mentioned) and then try refer to the same Label say in a MVC statement, it gives a Compile error, saying that the label is out of reach by 100 or some bytes from the current USING statement. Although hte MVC statement referencing the Labeled DC statement will immediately follow the DC statement. If I need to add a DC statement with a Label and use the Label in the program, I can add achieve it only by adding the statemet in the Work-area I referred to earlier.

And how does the compiler comes to know which type of addressing to be used for this code.

Thanks,
DGupta.