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Assembler Queries

 
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rnanavaty
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Joined: 12 Apr 2006
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PostPosted: Tue Jul 12, 2011 3:16 am    Post subject: Assembler Queries Reply with quote

Hi,

1.) Can anybody tell me why number of registers are constraint with 16 in MVS.

I know it has to do very basics of assembler hardware but didn't got instant answer.

2.) While changing a 24bit assembler program to 31 bit or vice-versa, what all things needs to keep in mind.

I think somebody will be able to provide me the link related with this as this is also a comman query
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papadi
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PostPosted: Tue Jul 12, 2011 4:25 pm    Post subject: Reply with quote

Quote:

I know it has to do very basics of assembler hardware but didn't got instant answer.
Well, this is the answer. The code can only use what is privided for. . . And this is 16.

I do not believe there is a simple answer to the second question. . .
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di
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zatlas
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PostPosted: Tue Jul 19, 2011 12:20 pm    Post subject: Reply with quote

Many eons ago, IBM created the mainframe with the same mindset that reappeared later in the first IBM PC... "nobody will ever need more then 16,777,215 bytes (that's 16MB) of RAM" (and in the PC it was 640K!)
They actually put the limitation in the hardware and used the left hand byte of the address register for something else. This something else assured that any transition to larger memory will never go smoothly. They actually needed to create a new set of instructions and at the same time maintain compatibility with the past... what a mess!
ZA
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zatlas
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PostPosted: Tue Jul 19, 2011 12:26 pm    Post subject: Reply with quote

Firstly make sure you use the newer instructions
NO LA, BAL, BALR, etc.
See this link:
http://publib.boulder.ibm.com/infocenter/zos/v1r11/index.jsp?topic=/com.ibm.zos.r11.ieaa600/iea2a69046.htm
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asr2
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PostPosted: Fri Jul 22, 2011 2:40 am    Post subject: Reply with quote

The basic problem does not really concern the use of old instructions such as BAL but rather the use of "clean" addresses and the obvious restriction that an AMODE 24 program cannot access 31-bit addresses. Other problems result when AMODE 31 (sub)programs are loaded dynamically and invoked from AMODE 24 programs; in this case the appropriate mode switches must be made, something that standard IBM macros (CALL, RETURN) do not support. IO macros are another concern. This is obviously no comprehensive discussion, but some of the important considerations.

A comment on the initial question concerning the 16 general purpose registers. There has been a partial relaxation here: some of the newer instructions allow the two halves (each 32 bit) of the 64-bit registers (that are always present) to be used separately.
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Anuj Dhawan
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Joined: 19 Jul 2007
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Location: Mumbai,India

PostPosted: Sat Jul 30, 2011 11:31 am    Post subject: Re: Assembler Queries Reply with quote

rnanavaty wrote:
1.) Can anybody tell me why number of registers are constraint with 16 in MVS.
This might help you:
Quote:
In the early microprocessor days of the 1970's, CPUs had only a small number of registers and a very limited instruction set. Typically, the arithmetic unit could only operate on a single CPU register, often referred to as the "accumulator". The accumulator on the 8 bit 8080 & Z80 processors was called "A". There were 6 other general purpose 8 bit registers: B, C, D, E, H & L. These six registers could be paired up to form 3 16 bit registers: BC, DE & HL. Internally, the accumulator was combined with the Flags register to form the AF 16 bit register.

When Intel developed the 16 bit 8086 family they wanted to be able to port 8080 code, so they kept the same basic register structure:

Quote:
8080/Z80 8086
A AX
BC BX
DE CX
HL DX
IX SI
IY DI
Because of the need to port 8 bit code they needed to be able to refer to the individual 8 bit parts of AX, BC, CX & DX. These are called AL, AH for the low & high bytes of AX and so on for BL/BH, CL/CH & DL/DH. IX & IY on the Z80 were only ever used as 16 bit pointer registers so there was no need to access the two halves of SI & DI.

When the 80386 was released in the mid 1980s they created "extended" versions of all the registers. So, AX became EAX, BX became EBX etc. There was no need to access to top 16 bits of these new extended registers, so they didn't create an EAXH pseudo register.

AMD applied the same trick when they produced the first 64 bit processors. The 64 bit version of the AX register is called RAX. So, now you have something that looks like this:

Quote:
|63..32|31..16|15-8|7-0|
|AH.|AL.|
|AX.....|
|EAX............|
|RAX...................|

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Anuj
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